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Anantha Nag Nemmani

from Austin, TX
Age ~44
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Also known as:
Anantha N Nemmani, Ananthana G Nemmani, Anantha Nag I, Anantha I
Related to:
Subbarao Allamneni, 52Ksheera RaoKalyani LankaSathya M Lanka
Connected to:
Ann T Nemmers, 72Erica S Nemmers, 53Janet A Nemmers, 85Jeannie M Nemmers, 44Natalie L Nemmers, 51Denise G Nemnich, 54Erik B Nemnich, 42Joshua A Nemo, 38Penny S Nemoede, 76Michael N Nemoir, 79

Anantha Nemmani Phones & Addresses

  • Austin, TX
  • Corvallis, OR

Work

Company: Lutron electronics Apr 2018 Position: Principal design engineer

Education

Degree: Master of Science, Masters School / High School: Oregon State University 2003 to 2005 Specialities: Electrical Engineering

Skills

Analog Circuit Design • Rf • Ic • Cmos • Semiconductors • Rf Design • Mixed Signal • Circuit Design • Analog • Asic • Embedded Systems • Cadence • Vlsi • Low Power Design • Cadence Virtuoso • Soc • Rf Measurement • Electronics • Silicon • Spice • Simulations • Eda • Pcb Design • Microelectronics • Pll • Power Management • Spectre • Signal Processing • Hardware Architecture • Integrated Circuit Design • Debugging • Sensors • Semiconductor Industry • Signal Integrity • Embedded Software • Microcontrollers • Analog Design

Languages

English • Hindi • Telugu

Industries

Semiconductors

Resumes

Resumes

Anantha Nemmani Photo 1

Principal Design Engineer

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Location:
6605 Estana Ln, Austin, TX 78739
Industry:
Semiconductors
Work:
Lutron Electronics
Principal Design Engineer
Silicon Labs Feb 2015 - Jan 2016
Staff Design Engineer
Ketra, Inc. Feb 2015 - Jan 2016
Principal Design Engineer
Silicon Labs May 2012 - Feb 2015
Senior Design Engineer
St-Ericsson May 2010 - May 2012
Senior Design Engineer
Education:
Oregon State University 2003 - 2005
Master of Science, Masters, Electrical Engineering Indian Institute of Technology, Madras 1998 - 2003
Bachelors, Bachelor of Technology, Electrical Engineering Srm Junior College 1996 - 1998
St. Alphonsus High School, Nalgonda 1984 - 1996
St.alphonsus High School
Skills:
Analog Circuit Design
Rf
Ic
Cmos
Semiconductors
Rf Design
Mixed Signal
Circuit Design
Analog
Asic
Embedded Systems
Cadence
Vlsi
Low Power Design
Cadence Virtuoso
Soc
Rf Measurement
Electronics
Silicon
Spice
Simulations
Eda
Pcb Design
Microelectronics
Pll
Power Management
Spectre
Signal Processing
Hardware Architecture
Integrated Circuit Design
Debugging
Sensors
Semiconductor Industry
Signal Integrity
Embedded Software
Microcontrollers
Analog Design
Languages:
English
Hindi
Telugu

Publications

Us Patents

Transport Of An Analog Signal Across An Isolation Barrier

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US Patent:
20150063434, Mar 5, 2015
Filed:
Apr 30, 2014
Appl. No.:
14/266153
Inventors:
- Austin TX, US
Douglas R. Frey - Bethlehem PA, US
Michael J. Mills - Austin TX, US
András Vince Horvath - Budapest, HU
Anantha Nag Nemmani - Austin TX, US
Assignee:
Silicon Laboratories Inc. - Austin TX
International Classification:
H04L 27/156
US Classification:
375238
Abstract:
An analog signal is transported across an isolation channel using edge modulation/demodulation of a pulse width modulated (PWM) signal. An edge modulator is responsive to rising edges of the PWM signal to generate first pulses having a first predetermined pulse width and is responsive to receipt of falling edges of the PWM signal to generate second pulses having a second predetermined pulse width with the same polarity as the first pulses. On the opposite side of the isolation channel an edge demodulating circuit recreates the PWM signal using the first and second pulses. The rise and falling edges of the PWM signals can be distinguished based on the pulse width of the first and second pulses. A second order pulse width modulator may be used to generate the PWM signal.

Isolated Serializer-Deserializer

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US Patent:
20140307759, Oct 16, 2014
Filed:
Sep 30, 2013
Appl. No.:
14/041459
Inventors:
- Austin TX, US
Michael J. Mills - Austin TX, US
Hua Zhu - Austin TX, US
Riad Wahby - Austin TX, US
Jeffrey L. Sonntag - Austin TX, US
Yunteng Huang - Palo Alto CA, US
Anantha Nag Nemmani - Austin TX, US
Assignee:
Silicon Laboratories Inc. - Austin TX
International Classification:
H04B 1/40
H04B 3/32
US Classification:
375219
Abstract:
A first integrated circuit die receives input data from a plurality of input channels and combines the input data from the plurality of input channels into combined data. The first integrated circuit die transmits the combined data across an isolation communication channel. A second integrated circuit die that is coupled to the isolation communication channel decodes the transmitted combined data and supplies the decoded transmitted combined data to respective output channels corresponding to the input channels.
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Anantha Nag Nemmani from Austin, TX, age ~44 Get Report