Ammon J Christiansen

20200310801, Oct 1, 2020

Mar 27, 2019

16/367171

- Santa Clara CA, US
Srikanth Srinivasan - Portland OR, US
Matthew Merten - Hillsboro OR, US
Ammon Christiansen - Hillsboro OR, US

G06F 9/30
G06F 9/38
G06F 9/48
G06F 9/22

A processor and method are described for a multi-level reservation station. For example, one embodiment of an apparatus comprises: execution circuitry comprising a plurality of functional units to execute a plurality of operations; a reservation station comprising a plurality of entries to store a corresponding plurality of operations to be executed on one or more of the functional units, the reservation station comprising: a first RS level to hold a first subset of the plurality of operations which are ready for execution by one or more functional units or which are expected to be ready for execution by the functional units; a second RS level to hold a second subset of the plurality of operations which are not expected to be ready for execution by the functional units; operation evaluation circuitry to evaluate operations in the first RS level and, responsive to identifying one or more operations which are not expected to be ready for execution, to cause the one or more operations to be moved from the first RS level to the second RS level.

20180164845, Jun 14, 2018

Dec 12, 2016

15/375344

- Santa Clara CA, US
Ammon J. Christiansen - Hillsboro OR, US

G06F 1/08
G06F 1/12
G06F 5/14
G06F 13/42

A processor includes a plurality of processing cores; a frequency divider; and a synchronous first in first out (FIFO) buffer. The frequency divider frequency divides a first clock signal that is associated with a first clock domain to provide a second clock signal that is associated with a second clock domain. The synchronous FIFO buffer has a write port that is associated with the first clock domain and a read port that is associated with the second clock domain. The synchronous FIFO communicates the data between the first and second clock domains.

20170024213, Jan 26, 2017

May 19, 2016

15/159040

- Santa Clara CA, US
Srikanth T. SRINIVASAN - Portland OR, US
Matthew C. MERTEN - Hillsboro OR, US
Chia Yin Kevin LAI - Portland OR, US
Ammon J. CHRISTIANSEN - Hillsboro OR, US
Justin M. DEINLEIN - Portland OR, US

G06F 9/38

A processor and method are described for scheduling operations for execution within a reservation station. For example, a method in accordance with one embodiment of the invention includes the operations of: classifying a plurality of operations based on the execution ports usable to execute those operations; allocating the plurality of operations into groups within a reservation station based on the classification, wherein each group is serviced by one or more execution ports corresponding to the classification, and wherein two or more entries within a group share a common read port and a common write port; dynamically scheduling two or more operations in a group for concurrent execution based on the ports capable of executing those operations and a relative age of the operations.

20150007188, Jan 1, 2015

Jun 29, 2013

13/931864

Bambang SUTANTO - Portland OR, US
Srikanth T. SRINIVASAN - Portland OR, US
Matthew C. MERTEN - Hillsboro OR, US
Chia Yin Kevin LAI - Portland OR, US
Ammon J CHRISTIANSEN - Aloha OR, US
Justin M DEINLEIN - Portland OR, US

G06F 9/50

718104

A processor and method are described for scheduling operations for execution within a reservation station. For example, a method in accordance with one embodiment of the invention includes the operations of: classifying a plurality of operations based on the execution ports usable to execute those operations; allocating the plurality of operations into groups within a reservation station based on the classification, wherein each group is serviced by one or more execution ports corresponding to the classification, and wherein two or more entries within a group share a common read port and a common write port; dynamically scheduling two or more operations in a group for concurrent execution based on the ports capable of executing those operations and a relative age of the operations.