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Allan A Alaspa

from Austin, TX
Age ~81
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Also known as:
Allan Alec Alaspa, Alan Alaspa, Allen Alaspa, Allan Alasda
Phone and address:
9713 Tree Bend Dr, Austin, TX 78750
(512) 258-1408
Related to:
Blythe K Aronowitz, 48Donald L Golman, 96Gina M Cutts, 59April L Alaspa, 49Ross A Alaspa, 52Kathleen C Alaspa, 78Ross A Golman, 47Evan H Aronowitz, 52
Connected to:
Chad E Alaspa, 58Steven C Alaspa, 62Bilal A Alasry, 40Jose G Alastre, 46Maria Alastuey, 100Vladimiro G Alata, 54Ahmed Alatabi, 39John E Alatalo, 77William W Alatalo, 90Stephanie K Alatan, 58

Allan Alaspa Phones & Addresses

  • 9713 Tree Bend Dr, Austin, TX 78750 (512) 258-1408 (512) 258-1922
  • 9804 Brandywine Cir, Austin, TX 78750 (512) 258-1408

Work

Company: Motorola Jun 1999 Position: Retired and retired

Education

Degree: Masters, Bachelors, Bachelor of Science In Electrical Engineering, Master of Science In Electrical Engineering School / High School: University of Wisconsin - Madison 1962 to 1967 Specialities: Electrical Engineering

Skills

Analog • Mixed Signal • Six Sigma • Marketing • Embedded Software • Semiconductor Industry • Cmos • Wireless • Testing • Product Marketing • Cross Functional Team Leadership • Semiconductors • Process Improvement • Engineering Management • Manufacturing • Electronic Circuit Design • Business Process Improvement • Product Management • Program Management

Industries

Electrical/Electronic Manufacturing

Resumes

Resumes

Allan Alaspa Photo 1

Allan Alaspa

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Location:
2101 Eagle Pkwy, Fort Worth, TX 76177
Industry:
Electrical/Electronic Manufacturing
Work:
Motorola
Retired and Retired
Rca Aerospace Jan 1968 - Aug 1970
Design Engineer
Education:
University of Wisconsin - Madison 1962 - 1967
Masters, Bachelors, Bachelor of Science In Electrical Engineering, Master of Science In Electrical Engineering, Electrical Engineering
Skills:
Analog
Mixed Signal
Six Sigma
Marketing
Embedded Software
Semiconductor Industry
Cmos
Wireless
Testing
Product Marketing
Cross Functional Team Leadership
Semiconductors
Process Improvement
Engineering Management
Manufacturing
Electronic Circuit Design
Business Process Improvement
Product Management
Program Management

Publications

Us Patents

Regulated Constant Current Circuit

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US Patent:
41277830, Nov 28, 1978
Filed:
Apr 25, 1977
Appl. No.:
5/790365
Inventors:
Allan A. Alaspa - Austin TX
Assignee:
Motorola, Inc. - Schaumburg IL
International Classification:
H03K 1700
US Classification:
307297
Abstract:
A CMOS regulated constant current circuit includes a first reference circuit producing a reference voltage applied to one input of an operational amplifier. The output of the operational amplifier is connected to the gate electrode of a reference field effect transistor having its source connected to ground and its drain connected to the other input of the operational amplifier and to one terminal of a control resistor, the other terminal of the reference field effect transistor being coupled to a plurality of CMOS transmission gates. Each of the CMOS transmission gates can controllably be switched on independently in order to apply the operational amplifier output voltage to a respective one of a plurality of output field effect transistors of the same conductivity type as the reference field effect transistor and each having its source connected to ground. The drains of the output field effect transistors can then be utilized to provide switchable constant currents which can be utilized, for example, to drive light-emitting diodes. The output currents are essentially independent of CMOS manufacturing processing parameters.

Low Leakage Cmos Analog Switch Circuit

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US Patent:
44463901, May 1, 1984
Filed:
Dec 28, 1981
Appl. No.:
6/334992
Inventors:
Allan A. Alaspa - Austin TX
Assignee:
Motorola, Inc. - Schaumburg IL
International Classification:
H03K 1716
H03K 17693
US Classification:
307579
Abstract:
A low leakage CMOS analog switch circuit comprising conventional MOS switches having transistors of high threshold voltages coupled to an interface circuit comprising transistors of low threshold voltages is provided. The N-channel threshold voltage of transistors in the switches is adjusted upward and the P-channel threshold voltage of transistors in the interface circuit is adjusted downward through the use of a single mask in one process step.

Single Clock Cmos Logic Circuit With Selected Threshold Voltages

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US Patent:
42504066, Feb 10, 1981
Filed:
Dec 21, 1978
Appl. No.:
5/971755
Inventors:
Allan A. Alaspa - Austin TX
Assignee:
Motorola, Inc. - Schaumburg IL
International Classification:
H03K 1908
G11C 1928
US Classification:
307205
Abstract:
A CMOS logic circuit having a basic CMOS shift register useful as a shift register or in sequential logic circuits is provided. The circuit has two inverters plus an output inverter and two transistors which are enabled by a clock signal to couple the inverters together. The use of a single input clock signal along with the reduced number of transistors is achieved by proper selection of threshold voltages of the transistors.
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Allan A Alaspa from Austin, TX, age ~81 Get Report