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Albert J Leitich

from Cocoa, FL
Age ~95

Albert Leitich Phones & Addresses

  • 4475 James Rd, Cocoa, FL 32926 (321) 633-6970
  • Chicago, IL
  • 1437 Croton Dr, Newaygo, MI 49337
  • Melbourne, FL
  • 4475 James Rd, Cocoa, FL 32926

Publications

Us Patents

Radiotelephone System Employing Digitized Speech/Data Signalling

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US Patent:
48767409, Oct 24, 1989
Filed:
Feb 13, 1989
Appl. No.:
7/310013
Inventors:
Stephen N. Levine - Chicago IL
Albert J. Leitich - Chicago IL
Assignee:
Motorola, Inc. - Schaumburg IL
International Classification:
H04Q 704
US Classification:
455 33
Abstract:
A cellular radiotelephone system is disclosed in which the signalling protocol for the system is embedded in the frame synchronization of the digital messages transmitted on the system. Multiple functions are accomplished by the synchronization signal and include call supervision, mode definition, and data frame synchronization. The synchronization signal is a high auto correlation, low cross correlation sequence of a predetermined number of data bits. Different bit sequences may be employed as a synchronization signal while conveying call supervision information defining the serving fixed site. Additionally, the logical inverse of the synchronizing signal may be utilized interchangably with the synchronizing signal to define the fixed site. A repetitive pattern of synchronizing signals and logical inverse synchronizing signals convey system mode information without increasing signalling overhead or losing the correlation performance of the full synchronization word.

Concatenation Technique For Burst-Error Correction And Synchronization

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US Patent:
40328864, Jun 28, 1977
Filed:
Dec 1, 1975
Appl. No.:
5/636472
Inventors:
John En - Palatine IL
Albert Joseph Leitich - Chicago IL
Assignee:
Motorola, Inc. - Schaumburg IL
International Classification:
G06F 1112
US Classification:
3401461AQ
Abstract:
A system for processing a digital information bit stream and generating a data bit stream. The processing includes convolutional burst error correction encoding which is capable of correcting burst errors of length 2B, where B is any positive integer. Inherent in such systems are the requirements of 2B and 5B zero level bits at the beginning, and end, respectively, of the data bit stream. The processing further includes encoding n sync bits at the beginning of the data bit stream. The improvement includes encoder apparatus for replacing the 2B zero bits with the n sync bits; and, decoder apparatus for detecting a threshold number of sync bits and, in response thereto, replacing each sync bit with a zero bit. This improvement significantly reduces the number of bits otherwise required in the data bit stream. Modifications render the system suitable for processing time diversity data transmissions, or for concatenating sync bits at the conclusion of each message in a fixed length, sequential message transmission system.
Albert J Leitich from Cocoa, FL, age ~95 Get Report