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Scott J Frommer

from Durham, NC
Age ~42
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Also known as:
Scott Jay Frommer, Scott J Frummer, Scott Fromer, Frommer Scott
Phone and address:
3912 Saint Marks Rd, Durham, NC 27707
(919) 908-8920
Related to:
Anne FrommerNicole King, 36Penny D Johnson, 69Jerry King, 73Paul King, 80Nancy King
Connected to:
Alan G Frommer, 76Eliezer A Frommer, 46Heather M Frommer, 47Jeanette J Frommer, 82Joyce C Frommert, 67Laurence D Frommer, 60Amanda K Frommeyer, 49Sara Frommeyer, 49Sean M Frommeyer, 43Patricia A Fromong, 62

Scott Frommer Phones & Addresses

  • 3912 Saint Marks Rd, Durham, NC 27707 (919) 908-8920
  • 2307 Mcqueen Dr, Durham, NC 27705 (919) 384-7202
  • New York, NY
  • 150 Nelson Rd, Scarsdale, NY 10583 (914) 722-4745 (914) 725-2032

Resumes

Resumes

Scott Frommer Photo 1

Soc Verification Engineer

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Location:
34 Parsonage St, Cold Spring, NY 10516
Industry:
Computer Hardware
Work:
Amd
Soc Verification Engineer
Ibm Jul 2001 - Jul 2011
Staff Engineer and Scientist
Education:
Polytechnic University 2014 - 2016
Master of Science, Masters New York University - Polytechnic School of Engineering 2003 - 2006
Master of Science, Masters, Computer Science New York University - Polytechnic School of Engineering 1999 - 2001
Master of Science, Masters, Computer Engineering School of Visual Arts 1982 - 1986
Bachelors, Bachelor of Fine Arts, Graphic Design
Scott Frommer Photo 2

Vice President And Controller, Atlantic Division

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Location:
Palo Alto, CA
Industry:
Hospital & Health Care
Work:
Labcorp
Vice President and Controller, Atlantic Division
Labcorp Jan 1, 2017 - Feb 2019
Vice President: Investor Relations
Labcorp May 2015 - May 2016
Associate Vice President: Investor Relations
Labcorp Aug 2012 - Dec 2014
Director: Corporate Development
Ethicon, Inc. May 2011 - Aug 2011
Summer Intern, Global Marketing: Product Development Group
Education:
Fuqua School of Business, Duke University 2012 - 2012
Master of Business Administration, Masters Duke University - the Fuqua School of Business 2010 - 2012
Master of Business Administration, Masters, Management Duke University 2000 - 2004
Bachelors, Bachelor of Science, Economics
Skills:
Financial Modeling
Venture Capital
Strategy
Mergers and Acquisitions
Business Strategy
Business Development
Private Equity
Valuation
Healthcare
Due Diligence
M&A Experience
Corporate Development
Strategic Planning
Communication
Mergers
Investment Banking
Cross Functional Team Leadership
Financial Analysis
Competitive Analysis
Management
Leadership
Scott Frommer Photo 3

Scott Frommer

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Publications

Us Patents

Mechanism In A Multi-Threaded Microprocessor To Maintain Best Case Demand Instruction Redispatch

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US Patent:
7380062, May 27, 2008
Filed:
Feb 11, 2005
Appl. No.:
11/055818
Inventors:
Scott Bruce Frommer - Cold Spring NY, US
Sheldon B. Levenstein - Austin TX, US
Bruce Joseph Ronchetti - Austin TX, US
Anthony Saporito - Hyde Park NY, US
Assignee:
International Business Machines Corporation - Armonk NY
International Classification:
G06F 12/02
US Classification:
711118, 711167, 711168, 711213
Abstract:
A method and system for maintaining a best-case demand redispatch of an instruction to allow for maximizing the time a rejected thread may execute in lookahead execution mode, while maintaining the smallest L1 cache miss penalty supported by the memory subsystem. In response to a demand miss, a load/store unit sends a fetch request to the next level cache. The cache line of the demand miss is examined to identify the critical sector. Once the critical sector is identified, a best-case data return time is determined based on the fastest time the next level cache is able to return the critical sector of the cache line. The load/store unit then sends a speculative warning to the dispatch unit to coincide with the best-case data return, wherein the speculative warning prepares the dispatch unit to resend the instruction for execution as soon as data is available to the processor core.

Mechanism In A Multi-Threaded Microprocessor To Maintain Best Case Demand Instruction Redispatch

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US Patent:
7571283, Aug 4, 2009
Filed:
May 1, 2008
Appl. No.:
12/113561
Inventors:
Scott B. Frommer - Cold Spring NY, US
Sheldon B. Levenstein - Austin TX, US
Bruce J. Ronchetti - Austin TX, US
Anthony Saporito - Hyde Park NY, US
Assignee:
International Business Machines Corporation - Armonk NY
International Classification:
G06F 12/08
US Classification:
711118, 711119, 711140, 711167
Abstract:
A method and system for maintaining a best-case demand redispatch of an instruction to allow for maximizing the time a rejected thread may execute in lookahead execution mode, while maintaining the smallest L1 cache miss penalty supported by the memory subsystem. In response to a demand miss, a load/store unit sends a fetch request to the next level cache. The cache line of the demand miss is examined to identify the critical sector. Once the critical sector is identified, a best-case data return time is determined based on the fastest time the next level cache is able to return the critical sector of the cache line. The load/store unit then sends a speculative warning to the dispatch unit to coincide with the best-case data return, wherein the speculative warning prepares the dispatch unit to resend the instruction for execution as soon as data is available to the processor core.

Recovery Of Global History Vector In The Event Of A Non-Branch Flush

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US Patent:
20050027975, Feb 3, 2005
Filed:
Jul 31, 2003
Appl. No.:
10/631055
Inventors:
Scott Frommer - Cold Spring NY, US
Balaram Sinharoy - Poughkeepsie NY, US
Assignee:
International Business Machines Corporation - Armonk NY
International Classification:
G06F009/00
US Classification:
712240000
Abstract:
A method and system for recovering a global history vector. In the event of a non-branch flush, a tag may be received by a queue configured to store information about branch instructions. The queue may read a copy of the global history vector from an entry indexed by the tag. This copy may be inserted in a global history vector mechanism (“GHV mechanism”) configured to manage the global history vector. If the flush operation is a flush to a group of instructions that contains no branch instructions and the tag does not equal the next-to-write pointer in the queue, then the queue may transmit a command to the GHV mechanism to enter a mode where the GHV mechanism does not update the global history vector until the next branch instruction is fetched.
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Scott J Frommer from Durham, NC, age ~42 Get Report