Patrick S Williams

7971171, Jun 28, 2011

May 20, 2008

12/123769

Joachim Keinert - Altdorf, DE
Howard H. Smith - Beacon NY, US
Patrick M. Williams - Salt Point NY, US

International Business Machines Corporation - Armonk NY

G06F 17/50

716115, 716112, 716113, 716136

The invention relates to an electromigration analysis method and a system for analyzing one or more nets in a digital integrated circuit design that are at risk of electromigration. The method comprises the steps of providing at least one interconnect between a driver cell and at least one load cell; applying same extracted netlist data for noise and/or timing analysis and for electromigration analysis; modeling the driver cell by a train of trapezoidal voltage pulses transmitted from the driver cell to the one or more load cells through the at least one interconnect; extracting at least a slew rate of a driver voltage signal and/or timing information from a noise and/or timing analysis for the one or more nets; and comparing a locally measured current density in the at least one interconnect to an effective local maximum current density limit of the at least one interconnect.

8239804, Aug 7, 2012

Sep 30, 2009

12/570418

Ibrahim M. Elfadel - Cortlandt Manor NY, US
Tarek A. El-Moselhy - Cambridge MA, US
David J. Widiger - Pflugerville TX, US
Patrick M. Williams - Salt Point NY, US

International Business Machines Corporation - Armonk NY

G06F 17/50

716124, 716119

Computing the gradients of capacitances in an integrated circuit chip layout with respect to design and process parameters is described. Included is a shape processing engine in the form of a variational mapping engine and a capacitance calculation engine that includes a gradient calculation engine. The variational mapping engine translates physical parameter variations into variations on the edges of the elementary patterns to which the layout of the integrated circuit is decomposed. The gradient calculation engine computes capacitance gradients by combining information from two sources. The first source consists of pre-existing gradients in a capacitance lookup table. The second source consists of analytical expressions of capacitance correction factors.