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Mitchell Reid

from Austin, TX
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Related to:
Doyle Wade Reid, 67Rosa A Lopez, 59Robin L Reed, 70George F Lopez, 77Marybel D Lopez, 59
Connected to:
Agripina E Reid, 68Aidan S Reid, 38Aimee Reid, 41Aislinn Y Reid, 33Aldo D Reid, 106Alexandre Reid, 35Alexander R Reid, 61Allyson K Reid, 31Ambrose B Reid, 89Arecia Reid, 54

Mitchell Reid Phones & Addresses

  • 8103 Richard King Ct, Austin, TX 78749 (512) 301-3955

Resumes

Resumes

Mitchell Reid Photo 1

Mitchell Reid

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Location:
Austin, TX
Industry:
Insurance
Skills:
Quality Control
Mitchell Reid Photo 2

Senior Systems Analyst

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Location:
Austin, TX
Industry:
Information Technology And Services
Work:
Tgslc
Senior Systems Analyst
Mitchell Reid Photo 3

Principal Design Engineer At Firefly Green Technology

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Location:
Austin, Texas Area
Industry:
Semiconductors
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Mitchell Reid

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Location:
United States

Business Records

Name / Title
Company / Classification
Phones & Addresses
Mitchell Reid
Principal
Blue Palantir Systems
Business Services
2409 Cecil Dr, Austin, TX 78744
(512) 338-0343
Mitchell Reid
Manager
H N Bull Information Systems
Electronic Computers
4020 S Industrial Dr, Austin, TX 78744
(512) 441-6015

Publications

Us Patents

Integrated Modem And Line-Isolation Circuitry With Command Mode And Data Mode Control And Associated Method

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US Patent:
6662238, Dec 9, 2003
Filed:
Jan 10, 2000
Appl. No.:
09/480726
Inventors:
Timothy J. Dupuis - Austin TX
Mitchell Reid - Austin TX
Assignee:
Silicon Laboratories Inc. - Austin TX
International Classification:
G06F 300
US Classification:
710 1, 710 61, 710 65, 712229
Abstract:
An improved modem architecture and associated method are disclosed that integrate modem functionality and line-side isolation functionality while also providing a modem interface that allows command and data mode control.

Integrated Modem And Line-Isolation Circuitry And Associated Method

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US Patent:
6714590, Mar 30, 2004
Filed:
Jan 10, 2000
Appl. No.:
09/480058
Inventors:
Timothy J. Dupuis - Austin TX
Andrew W. Krone - Austin TX
Mitchell Reid - Austin TX
Assignee:
Silicon Laboratories, Inc. - Austin TX
International Classification:
H04B 138
US Classification:
375222, 375220, 375257, 375258, 375377, 379 93, 455403
Abstract:
An improved modem architecture and associated method are disclosed that integrate modem and line-isolation circuitry so as to achieve modem functionality and system-side isolation functionality on a single integrated circuit.

Integrated Modem And Line-Isolation Circuitry With Data Flow Control And Associated Method

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US Patent:
6735246, May 11, 2004
Filed:
Jan 10, 2000
Appl. No.:
09/479486
Inventors:
Timothy J. Dupuis - Austin TX
Andrew W. Krone - Austin TX
Mitchell Reid - Austin TX
Assignee:
Silicon Laboratories Inc. - Austin TX
International Classification:
H04L 516
US Classification:
375222, 375257, 379 9305, 379 9329, 37939901
Abstract:
An improved modem architecture and associated method are disclosed that integrate modem functionality and line-side isolation functionality while also providing flow control of internal data between an isolation interface, digital-signal-processor (DSP) circuitry, and an analog input. The integrated modem and line-isolation circuit may also have an analog output for which data flow control is also provided.

Integrated Modem And Line-Isolation Circuitry With Selective Raw Data Or Modem Data Communication And Associated Method

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US Patent:
6826225, Nov 30, 2004
Filed:
Jan 10, 2000
Appl. No.:
09/480439
Inventors:
Timothy J. Dupuis - Austin TX
Andrew W. Krone - Austin TX
Mitchell Reid - Austin TX
Assignee:
Silicon Laboratories, Inc. - Austin TX
International Classification:
H04B 138
US Classification:
375222, 375220, 375257, 379 93
Abstract:
An improved modem architecture and associated method are disclosed that integrate modem functionality and line-side isolation functionality while also providing a modem interface that allows raw data, such as raw pulse-code-modulated (PCM) data, or modem data to be selectively communicated through a serial interface.

Integrated Modem And Line-Isolation Circuitry With Hdlc Framing And Associated Method

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US Patent:
7020187, Mar 28, 2006
Filed:
Jan 10, 2000
Appl. No.:
09/480747
Inventors:
Mitchell Reid - Austin TX, US
Timothy J. Dupuis - Austin TX, US
Assignee:
Silicon Laboratories Inc. - Austin TX
International Classification:
H04B 1/38
H04L 5/16
US Classification:
375220, 37939901
Abstract:
An improved modem architecture and associated method that integrates modem and line-isolation circuitry so as to achieve modem functionality and system-side isolation functionality on a single integrated circuit while also providing a modem interface that allows synchronous modem transmission protocols to be implemented through an asynchronous serial interface is disclosed. For example, one such type of synchronous modem transmission protocol is the HDLC (high-level data link control) protocol. According to the techniques disclosed herein, data and control information of an HDLC protocol may be presented at transmit and receive pins of a modem/system side DAA through an UART even though the UART may be an asynchronous serial receiver transmitter. Thus, both transmit and receive data transfers of a serial modem protocol may be implemented through an asynchronous serial interface.

Error Correction Of Data Across An Isolation Barrier

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US Patent:
7089475, Aug 8, 2006
Filed:
Mar 26, 2003
Appl. No.:
10/400182
Inventors:
Andrew W. Krone - Austin TX, US
Mitchell Reid - Austin TX, US
Assignee:
Silicon Laboratories Inc. - Austin TX
International Classification:
G06F 11/00
H04B 1/38
US Classification:
714746, 375220
Abstract:
A communication isolation system is provided that may employ error correction techniques for the data communicated across an isolation barrier used for connecting electronic circuitry to a communication line. In one embodiment, each data bit to be transmitted to or from the phone line may be transmitted three times across an isolation barrier so that it is possible to withstand a single electronic fast transient event. In another embodiment, the isolation barrier may be a capacitive isolation barrier. In another embodiment, the three transmissions of the data bit may be received across the isolation barrier and delay elements utilized to provide the data bits to a logic circuit in a synchronized fashion so that the three data bits may be compared to determine the error corrected data.

Techniques For Performing Gain And Phase Correction In A Complex Radio Frequency Receiver

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US Patent:
7643600, Jan 5, 2010
Filed:
Nov 30, 2006
Appl. No.:
11/565499
Inventors:
Adrian Maxim - Austin TX, US
Charles D. Thompson - Buda TX, US
Mitchell Reid - Austin TX, US
Assignee:
Silicon Laboratories, Inc. - Austin TX
International Classification:
H04L 25/40
H04L 7/00
H04L 25/00
US Classification:
375371, 375316, 375324, 375339, 375340, 375345
Abstract:
A receiver () includes a first mixing digital-to-analog converter (DAC) (), a second mixing DAC (), a direct digital frequency synthesizer (DDFS) (), a phase correction circuit (), a selectable load () and a magnitude correction circuit (). The first mixing DAC () includes a first input for receiving an input signal, a second input for receiving a digital first local oscillator (LO) signal and an output. The second mixing DAC () includes a first input for receiving the input signal, a second input for receiving a digital second local oscillator (LO) signal and an output. The DDFS () is configured to provide the first and second LO signals, which are quadrature signals. The phase correction circuit () is configured to provide a phase correction signal to a control input of the DDFS (). The first selectable load () includes an input coupled to the output of the first mixing DAC () and a control input. The magnitude correction circuit () is configured to provide a first magnitude correction signal to the control input of the first selectable load ().

Interface/Synchronization Circuits For Radio Frequency Receivers With Mixing Dac Architectures

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US Patent:
7773968, Aug 10, 2010
Filed:
Nov 30, 2006
Appl. No.:
11/565487
Inventors:
Adrian Maxim - Austin TX, US
Charles D. Thompson - Buda TX, US
Mitchell Reid - Austin TX, US
Assignee:
Silicon Laboratories, Inc. - Austin TX
International Classification:
H04B 1/10
US Classification:
455302, 455296, 341126, 375316
Abstract:
A receiver () includes a mixing digital-to-analog converter (DAC) (), a direct digital frequency synthesizer (DDFS) (A) and an interface (D). The mixing DAC () includes a radio frequency (RF) transconductance section () and a switching section (). The RE transconductance section () includes an input for receiving an RF signal and an output for providing an RE current signal. The switching section () is coupled to the RF transconductance section () and includes inputs for receiving bits associated with a digital local oscillator (LO) signal and an output that is configured to provide an analog output signal. The DDFS (A) includes outputs configured to provide the bits associated with the digital LO signal to the inputs of the switching section (). The interface (D) is coupled to the DDFS (A) and is configured to align the bits provided by the DDFS (A) with a first clock signal.
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Mitchell Reid from Austin, TX Get Report