Juan J Rubio

7340378, Mar 4, 2008

Nov 30, 2006

11/565106

Michael S. Floyd - Austin TX, US
Soraya Ghiasi - Austin TX, US
Karthick Rajamani - Austin TX, US
Juan C. Rubio - Austin TX, US

International Business Machines Corporation - Armonk NY

G06F 19/00

702186, 714 25

A weighted event counting system and method for processor performance measurements provides low latency and low error performance measurement capability. A weighted performance counter accumulates a performance count according to a plurality of event signals provided from functional units in the processor. Differing weights are applied to the event signals in according to the correlation between each event with processor performance. The weights may be provided from programmable registers, so that the weights can be adjusted under program control. The event signals may be combined to reduce the bit-width of the set of event signal, with mutually-exclusive events merged in single fields of the combinatorial result and events having the same weights merged according to a sub-total. The weights are applied to the combinatorial result and used to update a performance count. The performance count can then be used by power management software or hardware to make adjustments in operating parameters of the processor.

7533003, May 12, 2009

Dec 5, 2007

11/951310

Michael S. Floyd - Austin TX, US
Soraya Ghiasi - Austin TX, US
Karthick Rajamani - Austin TX, US
Juan C. Rubio - Austin TX, US

International Business Machines Corporation - Armonk NY

G01F 19/00

702186, 709238

A weighted event counting system and method for processor performance measurements provides low latency and low error performance measurement capability. A weighted performance counter accumulates a performance count according to a plurality of event signals provided from functional units in the processor. Differing weights are applied to the event signals in according to the correlation between each event with processor performance. The weights may be provided from programmable registers, so that the weights can be adjusted under program control. The event signals may be combined to reduce the bit-width of the set of event signal, with mutually-exclusive events merged in single fields of the combinatorial result and events having the same weights merged according to a sub-total. The weights are applied to the combinatorial result and used to update a performance count. The performance count can then be used by power management software or hardware to make adjustments in operating parameters of the processor.

7681054, Mar 16, 2010

Oct 3, 2006

11/538131

Soraya Ghiasi - Austin TX, US
Thomas Walter Keller - Austin TX, US
Karthick Rajamani - Austin TX, US
Juan C. Rubio - Austin TX, US

International Business Machines Corporation - Armonk NY

G06F 1/32
G06F 1/26

713320, 713300, 713323, 320127

Processing system performance is improved while meeting power management constraints in a processing system by using activity factor headroom estimation. The method and system estimate the power consumption of the system from a model that relates measured activities at a present operating point to power consumption for any available operating point of one or more processors in the system. The method then chooses the operating point(s) with the highest performance among the available operating points that will still meet budgetary constraints or specific thresholds of power consumption. The budgetary constraints or specific thresholds may be dynamically adjusted, and the method will update the operating point(s) to maintain safe operation and maximize performance. The method provides the best performance for the executing workload while ensuring safe operation.

7908493, Mar 15, 2011

Jun 6, 2007

11/758798

Andreas Bieswanger - Ehningen, DE
Michael S. Floyd - Cedar Park TX, US
Soraya Ghiasi - Austin TX, US
Steven P. Hartman - Round Rock TX, US
Hye-Young McCreary - Liberty Hill TX, US
Karthick Rajamani - Austin TX, US
Juan C. Rubio - Austin TX, US
Malcolm S. Ware - Austin TX, US

International Business Machines Corporation - Armonk NY

G06F 1/32

713300, 310320

A mechanism is provided for unified management of power, performance, and thermals in computer systems. This mechanism incorporates elements to effectively address all aspects of managing computing systems in an integrated manner, instead of independently. The mechanism employs an infrastructure for real-time measurements feedback, an infrastructure for regulating system activity, component operating levels, and environmental control, a dedicated control structure for guaranteed response/preemptive action, and interaction and integration components. The mechanism provides interfaces for user-level interaction. The mechanism also employs methods to address power/thermal concerns at multiple timescales. In addition, the mechanism improves efficiency by adopting an integrated approach, rather than treating different aspects of the power/thermal problem as individual issues to be addressed in a piecemeal fashion.

8171319, May 1, 2012

Apr 16, 2009

12/425189

Soraya Ghiasi - Boulder CO, US
Malcolm S. Ware - Austin TX, US
Karthick Rajamani - Austin TX, US
Michael S. Floyd - Austin TX, US
Juan C. Rubio - Austin TX, US

International Business Machines Corporation - Armonk NY

G06F 1/32

713321, 713322, 713323

Disclosed are systems, methods, and computer program products for managing power states in processors of a data processing system. In one embodiment, the invention is directed to a data processing system having dynamically configurable power-performance states (“pstates”). The data processing system includes a processor configured to operate at multiple states of frequency and voltage. The data processing system also has a power manager module configured to monitor operation of the data processing system. The data processing system further includes a pstates table having a plurality of pstate definitions, wherein each pstate definition includes a voltage value, a frequency value, and at least one unique pointer that indicates a transition from a given pstate to a different pstate. The voltage value, frequency value, and unique pointer of a given pstate definition are configurable, during operation of the data processing system, by the power manager module in response to changes in the operating parameters of the data processing system.

8174826, May 8, 2012

May 27, 2010

12/788863

Wael R. El-Essawy - Austin TX, US
Jarrod A. Roy - Austin TX, US
Juan C. Rubio - Austin TX, US

International Business Machines Corporation - Armonk NY

H05K 7/02

36167953, 361689, 361699, 361700, 165 804, 16510433, 16510434

A computing system is provided. In the computing system, a plurality of modules physically arranged in a three dimensional hexadron configuration. In the computing system, the at least one module is either a liquid-tight module filled with a non-conductive liquid coolant or a module cooled with a liquid coolant circulating through cold plates mounted on electronic components. In the computing system, the liquid coolant is circulated in a closed loop by at least one pump through a plurality of hoses through at least one of a plurality of heat exchangers. In the computing system, the plurality of heat exchangers is coupled to an exterior portion of the surface of the computing system. In the computing system, the plurality of heat exchangers cool the liquid coolant through finned tubes exposed to the surrounding air.

8179674, May 15, 2012

May 28, 2010

12/789583

John B. Carter - Austin TX, US
Wael R. El-Essawy - Austin TX, US
Elmootazbellah N. Elnozahy - Austin TX, US
Madhusudan K. Iyengar - Woodstock NY, US
Jian Li - Austin TX, US
Karthick Rajamani - Austin TX, US
Juan C. Rubio - Austin TX, US
William E. Speight - Austin TX, US
Lixin Zhang - Austin TX, US

International Business Machines Corporation - Armonk NY

G06F 1/20
H05K 7/20

36167949, 36167948, 3616795, 361694, 361695, 361721, 361788, 3122232, 312236

A scalable space-optimized and energy-efficient computing system is provided. The computing system comprises a plurality of modular compartments in at least one level of a frame configured in a hexadron configuration. The computing system also comprises an air inlet, an air mixing plenum, and at least one fan. In the computing system the plurality of modular compartments are affixed above the air inlet, the air mixing plenum is affixed above the plurality of modular compartments, and the at least one fan is affixed above the air mixing plenum. When at least one module is inserted into one of the plurality of modular compartments, the module couples to a backplane within the frame.

8279597, Oct 2, 2012

May 27, 2010

12/788925

Wael R. El-Essawy - Austin TX, US
Elmootazbellah N. Elnozahy - Austin TX, US
Madhusudan K. Iyengar - Woodstock NY, US
Juan C. Rubio - Austin TX, US

International Business Machines Corporation - Armonk NY

H05K 7/20
F28F 7/00
H05K 5/00

36167949, 36167954, 361697, 361703, 361709, 361715, 165 803, 454184

A modular processing module allowing in-situ maintenance is provided. The modular processing module comprises a set of processing module sides. Each processing module side comprises a circuit board, a plurality of connectors, and a plurality of processing nodes. Each processing module side couples to another processing module side using at least one connector in the plurality of connectors such that, when all of the set of processing module sides are coupled together, the modular processing module is formed. The modular processing module comprises an exterior connection to a power source and a communication system and at least one heatsink that couples to at least a portion of the plurality of processing nodes on one of the processing module sides and is designed such that, when a set of heatsinks in the modular processing module are installed, an empty space is left in a center of the modular processing module.