James M Warren

56048750, Feb 18, 1997

Dec 19, 1994

8/358798

George R. Munce - Aloha OR
James D. Warren - Hillsboro OR

Intel Corporation - Santa Clara CA

G06F 1300
G06F 1200

395311

A cache SRAM connector assembly comprising a connector, a number of latches, and a number of high performance switches, is provided to a computer system. The connector removably connects either asynchronous or burst cache SRAM to a processor bus. The latches store cache access addresses being driven on a number of address lines of the processor bus. The high performance switches being coupled to both the latches and the address lines of the processor bus selectively provide the cache SRAM with latched access addresses as required by asynchronous cache SRAM or directly driven access addresses on the processor bus as required by burst cache SRAM.

62261886, May 1, 2001

Aug 10, 1998

9/131765

James F. Warren - Corbett OR

H05K 714

361802

A modular integrated pneumatic connection device adapted for precise location onto an upper platen accepts a printed circuit board (PCB) having the edge connectors thereof facing downwardly therefrom through a slot in that upper platen. The device includes pneumatically operated and spring loaded pistons at opposite ends thereof which interact with a bracket holding the PCB, such that upon placing that upper platen above a lower platen having disposed thereon a test board or the like including printed circuit board connectors that are in alignment with those PCBS, application of pneumatic pressure forces the edge connectors of those PCBs in the upper platen into the PCB connectors disposed on the test board or the like on the lower platen, thereby making electrical contact for testing and similar purposes, i. e. , as a "Unit Under Test" (UUT). Upon release of the pneumatic pressure, the PCB is withdrawn from that connection by operation of the above-mentioned springs.